Simon Says on Basys3 FPGA in Verilog

I spent a semester learning about digital logic design fundamentals, and week by week applying those in the lab while learning Verilog.

This project was very challenging, but very successful. It full runs a simon says game, from start to finish.

You can see all the source code here on my Gitlab profile.

Features:

• Fully functional “Simon Says” game
• Two optional cheat modes - press one button to repeat sequence
• Flip a switch to see the next 4 upcoming button presses

Skills Acquired:

• Fundamental knowledge of digital design, logic gates, and microprocessors
• Fundamentals of Verilog
• Programming in state machines
• Understanding of clocks and timing

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